Electronics and Telecommunication Engineering Faculty

Dr. Gautam Shah
 

Dr. Gautam Shah

  • Vice Principal

  • Date of Birth :10/30/2015

  • Unique ID :1-428224606

  • Qualification : PhD, M.E (Digital Techniques & Instrumentation), B.E (Electronics)

  • Email : gautamshah@sfit.ac.in

  • Phone : 02228928585-5321

  • Area of Interest : Circuits & Systems, Embedded Systems, Signal Processing, Control Systems, Automation


  • View Google Scholar Profile

Academic Background

Ph.D. Engineering

MPSTME, NMIMS, Mumbai, 2012

Dissertation Title: Algorithms and Architectures for Discrete Hartley Transform

M.E.(Digital Techniques & Instrumentation)

SGSITS, Indore, 1995

Thesis Title: Design and Development of Process Control Trainer

B.E. (Electronics)

Walchand Institute of Technology, Solapur, 1990

Project: Text in Picture

 

Research Interests

  • Signal Processing 
  • Control Systems

Work Experience

Total Teaching: 35 Years

  • Professor - July 2013 till date
  • Associate Professor - Aug 2001 to June 2013 (12 years)
  • Assistant Professor at SSVPS, Dhule - Aug 1990 to Aug 2001 (11 years)

 

Affiliations with Professional Bodies

  1. Amol Patil and Gautam Shah, "Consensus in a Multi-Agent System with Switching Topology", International Journal of Distributed Computing and Technology,2024; 10(02): 1-8p., DOI:10.37628/IJDCT, vol. 10., issue 2, pp. 1-8, November, 2024.

  2. Amol Patil and Gautam Shah, "Discrete Time Consensus Algorithm In Multi-Agent System", 2021 Seventh Indian Control Conference (ICC),, , pp. 183-187, December, 2021.

  3. Amol Patil and Gautam Shah, "Multi-Robot Trajectory Tracking and Rendezvous Algorithm", IETE Journal of Research, vol 1. no. 1, pp. 1-7, August, 2020.

  4. Akanksha Tiwari, Kavita Sakhardande, Gautam Shah, "Non Data Aided SNR Estimation for Nakagami-m Fading Channel", 4th International Students Conference on Electrical, Electronics and Computer Science (SCEECS-18), MANIT, Bhopal, , pp. 1-4, February, 2018.

  5. Payal Shah, Kavita Sakhardande and Gautam Shah, "Performance Analysis of LTE Network using QAM and MIMO Configuration", 4th International Students Conference on Electrical, Electronics and Computer Science (SCEECS-18), MANIT, Bhopal, , pp. 1- 6, February, 2018.

  6. Samson Vaz, Inderkumar Kochar and Gautam Shah, "Compact Dual-Band Antenna for 2.4/5.2/5.8-GHz WLAN Applications", International Conference on Micro-Electronics and Telecommuni-cation Engineering (ICMETE), SRM University, Ghaziabad, ICMETE.2016, , pp. 74-77, September, 2016.

  7. N. Parikh, Santosh Chapaneri and Gautam Shah, "No-reference image quality assessment using extreme learning machines", International Conference on Inventive Computation Technologies (ICICT), RVS Technical Campus, Coimbatore, , pp.1-5, August, 2016.

  8. Chacko Princy, Inderkumar Kochar, and Gautam Shah, "Design of Wideband Planar Printed Quasi-Yagi Antenna Using Defected Ground Structure", International Conference on Micro-Electronics, Electromagnetics and Telecommunications, ICMEET-2015, Department of Electronics and Communication Engineering, GITAM University, Visakhapatnam, Andhra Pradesh, India, , pp 663-671, December, 2015.

  9. G. A. Shah and T. S. Rathore, "A Fast Radix-4 Algorithm and Architecture for DHT", Int. Journal of Computer Science and Emerging Technologies, vol. 2, no. 5, pp 270-279, October, 2011.

  10. G. A. Shah and T. S. Rathore, "An analog architecture for split radix DHT", Int. Journal of Computer Applications, vol. 30, no. 4, pp 24-31, September, 2011.

  11. G. A. Shah and T. S. Rathore, "A Mixed-Mode Signal Processing Architecture for Radix-2 DHT", International Journal on Computer Science and Engineering, vol. 3, no. 6, pp. 2554-2564, June, 2011.

  12. G. A. Shah and T. S. Rathore, "An Analog Architecture for the Radix-4 DHT", UKSim 13th International Conference on Computer Modelling and Simulation,UKSim-2011, Cambridge University, UK, , pp. 545-550, April, 2011.

  13. G. A. Shah and T. S. Rathore, "A New Fast Radix-2 DIF Algorithm and Architecture for computing the DHT", Int. Journal of Simulation: Systems, Science and Technology, vol. 12, no. 1, pp 1-9, February, 2011.

  14. T. S. Rathore and G. A. Shah, "Matrix Approach: Better than applying Millers Equivalents", IETE Journal of Education, vol. 51, nos. 2 & 3, pp. 85-90, December, 2010.

  15. G. A. Shah and T. S. Rathore, "A New Architecture for Radix-2 DHT", IEEE International Conference on Computational Intelligence and Communication Networks, CICN-2010, Bhopal, India, , pp. 539-543, November, 2010.

  16. T. S. Rathore and G. A. Shah, "Miller Equivalents and Their Applications", Circuits, Systems and Signal Processing, Birkhauser, Boston, vol. 29, no. 4, pp. 757-768, August, 2010.

  17. G. A. Shah and T. S. Rathore, "A New Position-Based Fast Radix-2 Algorithm for computing the DHT", International Conference on Contemporary Computing, IC3-2009, JIIT University, Noida, India, , pp. 14-25, August, 2009.

  18. G. A. Shah and T. S. Rathore, "A New Fast Radix-2 Decimation-In-Frequency Algorithm for computing the Discrete Hartley Transform", First International Conference on Computational Intelligence, Communication Systems and Networks, CICSyN-2009, Indore, India, , pp 363-368, July, 2009.

  19. G. A. Shah and T. S. Rathore, "Position-Based Method for Computing the Elements of the Discrete Hartley Transform Matrix", International Technical Conference of IEEE Region 10, TENCON-2008, University of Hyderabad, Hyderabad, India, , pp. 1-5, November, 2008.

  20. G. A. Shah and T. S. Rathore, "Location-Based Method for Computing the Elements of the Discrete Hartley Transform Matrix", Fourteenth National Conference on Communications NCC-2008, IIT Bombay, Mumbai, , pp. 399-403, February, 2008.

  21. G. A. Shah and T. S. Rathore, "Design, Development and Applications of PC-Based Process Control Trainer for Automation", IETE Technical Review, vol. 25, no. 1, pp. 29-37, February, 2008.

  22. G. A. Shah and T. S. Rathore, "Current Trends in the Mixed-Mode Signal Processing Architectures", IETE Journal of Education, vol. 48, no. 3 & 4, pp. 115-120,, December, 2007.

  23. Gautam Shah, A. K. Sen, Pramod Shanbhag, and Deepak Jayaswal, "Indian Education Scenario in GATS Regime-A Panaromic View", National Seminar on The Role of Internal Quality Assurance Cell in Quality Enhancement, Yeshwant Mahavidyalaya, Nanded, , pp. 148-151, December, 2005.

  • Major Research Grant of Rs. 705000/- procured from AICTE for research project on 'MODROB Grant', for duration of 2 years in the academic year 2019-2021.
  • Minor Research Grant of Rs. 35000/- procured from University of Mumbai for research project on 'Smart Elevator', for duration of 1 year in the academic year 2014-2015.
  1. Conducted a session on, " Question Paper Setting & Analysis ", in 3 Days STTP on Faculty Induction Program - 2021 organized by Online, SFIT Mumbai, 02nd August,2021.
  2. Conducted a session on, " “Linear Integrated Circuits” Revised Syllabus R-2019 at S.E EXTC for University of Mumbai ", in 1 Day Workshop on Orientation Program organized by Online, VESIT, Mumbai, 09th February,2021.
  3. Conducted a session on, " Real Mechanics of Teaching ", in 1 Week STTP on Faculty Induction Program - 2018 organized by SFIT, Mumbai, 21st July,2018.
  4. Conducted a session on, " Linear Integrated Circuits, Revised Syllabus R-2017 at S.E EXTC for University of Mumbai ", in 1 Day Workshop on Orientation Programme organized by SFIT, Mumbai, 04th January,2018.
  5. Conducted a session on, " Curriculum Implementation ", in 1 Week STTP on Faculty Induction Program - 2016 organized by SFIT, Mumbai, 07th July,2016.
  6. Conducted a session on, " Course file compilation and Rubrics design techniques for outcome evaluation ", in 1 Week STTP on Faculty Induction Program - 2015 organized by SFIT, Mumbai, 10th July,2015.
  7. Conducted a session on, " Integrated Circuits, (Semester V) in the Revised Syllabus at T.E EXTC for University of Mumbai ", in 1 Day Workshop on Orientation Program organized by Don Bosco Institute of Technology, Kurla, Mumbai., 10th July,2014.
  8. Conducted a session on, " Hartley Transform ", in 1 Week STTP on ISTE approved STTP on Mathematical & Computational Techniques in Engineering, organized by SFIT, Mumbai, 30th March,2012.
  9. Conducted a session on, " Lesson Plan / Session Plan, Planning for the term and preparation of the Course File ", in 2 weeks STTP on ISTE approved STTPs on Faculty Induction Program - 2010, organized by SFIT, Mumbai, 01st July,2010.
  10. Conducted a session on, " Miller Equivalents and Their Applications ", in 2 Day Conference on National Conference on Electronics, Communications and Computers, NCECC-2009 organized by Chandragupt Hall, Abbott Hotel, Vashi, Navi Mumbai, India., 13th February,2009.
  11. Conducted a session on, " Evaluation of Answer-Scripts ", in 1 Day Workshop on The Art of Setting Question Papers and Evaluation organized by SFIT, Mumbai, 26th August,2008.
  12. Conducted a session on, " Use of Network Functions in Filter Theory ", in 1 Week STTP on ISTE approved STTP on Advances in Electrical Networks organized by SFIT, Mumbai, 11th July,2008.
  13. Conducted a session on, " Lesson Plan / Session Plan, Planning for the term and preparation of the Course File ", in 2 weeks STTP on ISTE approved STTP, Seventh In-house Faculty Development (Induction) Program organized by SFIT, Mumbai, 19th June,2007.
  14. Conducted a session on, " Architectures for Discrete Hartley Transform ", in 2 Days Conference on National Conf on Communications and Signal processing, NCCSP-2007 organized by Thadomal Shahani Engineering College, Bandra., 12th March,2007.
  15. Conducted a session on, " Current Trends in the Mixed-Mode Signal Processing Architectures ", in 3 Days Conference on National Conf on Information and Communication Technology, New Horizons in Technology and Applications, NCICT-2007, organized by D J Sanghvi College of Engineering, Vile Parle, Mumbai., 01st March,2007.
  16. Conducted a session on, " Lesson Plan / Session Plan, Planning for the term and preparation of the Course File ", in 2 weeks STTP on ISTE approved STTP, Sixth In-house Faculty Development (Induction) Program organized by SFIT, Mumbai, 19th June,2006.

PG Level

  • Modeling and Simulation of Communication Systems
  • Disaster Management & Mitigation Measures

 

UG Level

  • Basic Electrical Engineering 
  • Basic Electrical and Electronics Engineering
  • Electronic Devices & Circuits
  • Digital Logic Design
  • Filter Theory
  • Wave Shaping Techniques
  • Analog and Digital Integrated Circuits
  • Elements of Microprocessors
  • Linear Integrated Circuits

 

 

Workshop / Seminar / STTP Attended

  • Attended 1 Day "Strategic Leadership and Decision Making" organized by SFIMAR on 17th Dec, 2022 .
  • Attended 1 week "AICTE Workshop, Inculcating Universal Human Values in Technical Education" organized by AICTE from 25th Oct - 29th Oct, 2021 at Online, AICTE.
  • Attended 2 weeks "ISTE Workshop, Signals and Systems, " organized by IIT Kharagpur, NMEICT (MHRD). from 02nd Jan - 12th Jan, 2014 at SFIT, Mumbai .
  • Attended 2 weeks "ISTE Workshop on Analog Electronics" organized by IIT Kharagpur, National Mission on Education through ICT (MHRD) from 04th Jun - 14th Jun, 2013 at SFIT, Mumbai.
  • Attended 1 week "ISTE approved STTP on Mathematical & Computational Techniques in Engineering, " organized by Department of Electronics & Telecommunication, SFIT, Mumbai from 26th Mar - 30th Mar, 2012 at SFIT, Mumbai .
  • Attended 3 days "IEEE International Conference on Computational Intelligence and Communication Networks, CICN-2010" organized by RGPV, Bhopal and MIR Labs from 26th Nov - 28th Nov, 2010 at RGPV, Bhopal, India..
  • Attended 3 days "International Conference on Contemporary Computing, IC3-2009" organized by JIIT University and University of Florida from 17th Aug - 19th Aug, 2009 at JIIT University, Noida, India..
  • Attended 3 days "First International Conference on Computational Intelligence, Communication Systems and Networks, CICSyN-2009" organized by UK Simulation Society and Asia Modeling and Simulation Society from 23rd Jul - 25th Jul, 2009 at Hotel Lemon Tree, Indore, India..
  • Attended 3 days "International Technical Conference of IEEE Region 10, TENCON-2008" organized by IEEE Region 10 from 18th Nov - 21st Nov, 2008 at University of Hyderabad, Hyderabad, India..
  • Attended 3 days "Fourteenth National Conference on Communications, NCC-2008" organized by IIT Bombay from 01st Feb - 03rd Feb, 2008 at IIT Bombay, Mumbai.
  • Attended 2 days "IETE International Conference on Nanotechnology and Health Care Applications " organized by IETE, Mumbai from 12th Oct - 13th Oct, 2007 at CETTM, Hiranandani Gardens, Powai.
  • Attended 2 days "38th IETE Mid Term Symposium on Emerging Trends in Instrumentation and Process Automation" organized by IETE, Vadodara from 07th Apr - 08th Apr, 2007 at Hotel Surya Palace, Vadodara.
  • Attended 3 days "National Conf on Information and Communication Technology, New Horizons in Technology and Applications" organized by D. J. Sanghvi COE from 01st Mar - 03rd Mar, 2007 at DJSCOE, Vile Parle.
  • Attended 1 day "Workshop on "National Programme for Technology Enhanced Learning"" organized by IIT Bombay on 28th Jul, 2006 at C-DEEP, IIT Bombay.
  • Attended 1 Week "STTP on Accreditation of Technical Institutions" organized by NITTTR, Chandigarh from 13th Dec - 17th Dec, 2004 .
  • Attended 2 days "Seminar on "The Bridges for Electronics"" organized by DBIT, Mumbai from 12th Sep - 13th Sep, 2003 .
  • Attended 2 weeks "STTP on Faculty Development Programme" organized by SFIT, Mumbai from 15th Sep - 09th Feb, 2002 .

Workshop / Seminar / STTP Conducted

  • Conducted "Value added 30Hrs Course "Bridging the educational gap in Embedded Systems"" from 28th Jun - 02nd Jul, 2021 organized by Skill Development Cell & Department of Electronics & Telecommunication.
  • Conducted "Embedded Systems and Internet of Things" from 17th Jun - 21st Jun, 2019 organized by Department of Electronics & Telecommunications, SFIT.
  • Conducted "AICTE-ISTE approved one week STTP on Commercial Trends In Antennas & Microwave Technologies: Inclination towards StartUps" from 25th Jun - 29th Jun, 2018 organized by Department of Electronics & Telecommunication, SFIT.
  • Conducted "National Seminar on Recent Developments in Circuits Systems and Signal Processing" from 23rd Feb - 24th Feb, 2011 organized by Department of Electronics & Telecommunication, SFIT.
  • Conducted "Advances in Electrical Networks" from 07th Jul - 11th Jul, 2008 organized by Department of Electronics & Telecommunication, SFIT.