MADHAVI SONI
- Assistant Professor
- Date of Birth :11/05/1991
- Qualification : M-Tech
- Email : madhavi.soni@sfit.ac.in
- Phone : 02228928585
- Area of Interest : VLSI Design and Embedded Systems
View Google Scholar Profile
Academic Background
M-Tech, ESVD, JNTU Hyderabad, " Implementation of Edge Detection algorithm for classical image processing of Angiogram images on FPGA".
BE,ECE,Osmania University, " SPY Robot using TV tunner Card and wireless camera"
Research Interests
VLSI, Physical Design
Work Experience
4 years of teaching experience and 1 year of semiconductor Industrial experience (Physical Designing)
MADHAVI SONI, "Enhanced locker security system", IJPUB, Volume-6 / Issue 1 / March2018, 1849-1854, March, 2018.
MADHAVI SONI, "Implementation of Classical Image Processing for Edge Detection of Angiogram Images on FPGA", IJSETR, Vol.02,Issue.14,, 1604-1608, October, 2013.
No Data Available.
UG Level
VLSI Design , Microprocessor and Microcontroller , Linear Integrated Circuits, Embedded Systems ,EDC
Workshop / Seminar / STTP Attended
- Attended 1 week "IETE Appproved STTP NeXus-2025" organized by IETE from 08th Mar - 13th Mar, 2025 at Online.
- Attended 6 days "FDP on Semiconductor Materials & Manufacturing Technology (SMMT-24)" organized by AICTE from 02nd Dec - 07th Dec, 2024 at online.
- Attended 1 "Digital design through Arduino" organized by IIT Hyderabad on 06th Dec, 2016 at NMREC Hyderabad.